Robust and Attack Resilient Logic Locking with a High Application-Level Impact

Logic locking is a hardware security technique aimed at protecting intellectual property against threats in the IC supply chain, especially those posed by untrusted fabrication facilities. Such techniques incorporate additional circuitry within an integrated circuit (IC) that induces incorrect digital functionality when verification key provided user. The amount of error induced known as effectiveness technique. A family attacks “SAT attacks” provide strong mathematical formulation to find correct locked circuits. To achieve high SAT resilience (i.e., complexity attacks), many conventional logic schemes fail inject sufficient into incorrect. For example, case SARLock and Anti-SAT, there are usually very few (or only one) input minterms cause any output. state-of-the-art s tripped (SFLL) provides wide spectrum configurations introduced tradeoff between effectiveness. In this work, we prove such universal among all techniques. attain without compromising resilience, propose novel scheme, called Strong Anti-SAT (SAS). addition attacks, removal-based another popular kind attack where attacker tries identify remove structure. Based on SAS, also Robust SAS (RSAS) resilient removal maintains same SAS. RSAS have following significant improvements over existing (1) We not compromised increase . (2) contrast prior work focused solely circuit-level impact, integrate SAS-locked modules 80386 processor show has application-level impact. (3) Our experiments exhibit better than SFLL their similar SFLL.